HD6432621 Hitachi, HD6432621 Datasheet - Page 523

• Manufacturer Part Number: HD6432621
• Description: (HD64F262x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

Thus the reception margin in asynchronous mode is given by formula (1) below.
M = | (0.5 –
Where M : Reception margin (%)
Assuming values of F = 0 and D = 0.5 in formula (1), a reception margin of 46.875% is given by
formula (2) below.
When D = 0.5 and F = 0,
M = (0.5 –
However, this is only the computed value, and a margin of 20% to 30% should be allowed in
system design.
Internal basic
clock
Receive data
(RxD)
Synchronization
sampling timing
Data sampling
timing
= 46.875%
N : Ratio of bit rate to clock (N = 16)
D : Clock duty (D = 0 to 1.0)
L : Frame length (L = 9 to 12)
F : Absolute value of clock rate deviation
Figure 13-21 Receive Data Sampling Timing in Asynchronous Mode
2
2N
1
1
0
16
8 clocks
Start bit
) – (L – 0.5) F –
100%
16 clocks
7
| D – 0.5 |
N
15 0
(1 + F) | 100%
D0
7
... Formula (2)
... Formula (1)
15 0
D1
479