HD6432621 Hitachi, HD6432621 Datasheet - Page 749

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HD6432621

Manufacturer Part Number
HD6432621
Description
(HD64F262x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
Notes: *1
Program execution state
SLEEP command
SSBY = 1, PSS = 1
DTON = 1, LSON = 0
After the oscillation
stabilization time
(STS2 to 0), clock
switching exception
processing
*2
*3
NMI, IRQ0 to IRQ5, and WDT1 interrupts
NMI, IRQ0 to IRQ5, WDT0 interrupts, and WDT1 interrupt.
NMI and IRQ0 to IRQ5
• When a transition is made between modes by means of an interrupt, the transition cannot be made
• From any state except hardware standby mode, a transition to the reset state occurs when RES is
• From any state, a transition to hardware standby mode occurs when STBY is driven low.
• Always select high-speed mode before making a transition to watch mode or sub-active mode.
on interrupt source generation alone. Ensure that interrupt handling is performed after accepting the
interrupt request.
driven Low.
SCK2 to
SCK0= 0
High-speed mode
Sub-active mode
Medium-speed
(main clock)
(main clock)
Reset state
(subclock)
mode
: Transition after exception processing
RES pin = High
SCK2 to
SCK0 0
SLEEP command
SSBY = 1, PSS = 1
DTON = 1, LSON = 1
Clock switching
exception processing
Figure 21B-1 Mode Transition Diagram
STBY pin = High
RES pin = Low
SLEEP command
External
interrupt *
Interrupt *
LSON bit = 0
SLEEP command
SLEEP
command
Interrupt *
Any interrupt
Interrupt *
LSON bit = 1
SLEEP
command
SLEEP
command
3
1
2
1
: Low power dissipation mode
Program-halted state
SSBY= 1,
PSS= 0, LSON= 0
SSBY= 0,
PSS= 1, LSON= 1
SSBY= 0, LSON= 0
SSBY= 1,
PSS= 1, DTON= 0
STBY pin = Low
Sub-sleep mode
standby mode
standby mode
Watch mode
Sleep mode
(main clock)
(subclock)
(subclock)
Hardware
Software
705

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