HD6432621 Hitachi, HD6432621 Datasheet - Page 767

• Manufacturer Part Number: HD6432621
• Description: (HD64F262x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

21B.7.2 Hardware Standby Mode Timing
Figure 21B-4 shows an example of hardware standby mode timing.
When the STBY pin is driven low after the RES pin has been driven low, a transition is made to
hardware standby mode. Hardware standby mode is cleared by driving the STBY pin high,
waiting for the oscillation stabilization time, then changing the RES pin from low to high.
21B.8 Watch Mode
21B.8.1 Watch Mode
CPU operation makes a transition to watch mode when the SLEEP instruction is executed in high-
speed mode or sub-active mode with SBYCR SSBY=1, LPWRCR DTON = 0, and TCSR
(WDT1) PSS = 1.
In watch mode, the CPU is stopped and supporting modules other than WDT1 are also stopped.
The contents of the CPU is internal registers, the data in internal RAM, and the statuses of the
internal supporting modules (excluding the SCI, ADC, HCAN) and I/O ports are retained.
Oscillator
RES
STBY
Figure 21B-4 Hardware Standby Mode Timing
Oscillation
stabilization
time
exception
handling
Reset
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