HD6432621 Hitachi, HD6432621 Datasheet - Page 568

• Manufacturer Part Number: HD6432621
• Description: (HD64F262x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

15.2
15.2.1
The master control register (MCR) is an 8-bit readable/writable register that controls the CAN
interface.
Bit 7—HCAN Sleep Mode Release (MCR7): Enables or disables HCAN sleep mode release by
bus operation.
Bit 7: MCR7
0
1
Bit 6—Reserved: This bit always reads 0. The write value should always be 0.
Bit 5—HCAN Sleep Mode (MCR5): Enables or disables HCAN sleep mode transition.
Bit 5: MCR5
0
1
Bits 4 and 3—Reserved: These bits always read 0. The write value should always be 0.
Bit 2—Message Transmission Method (MCR2): Selects the transmission method for transmit
messages.
Bit 2: MCR2
0
1
524
Initial value:
MCR
Register Descriptions
Master Control Register (MCR)
R/W:
Bit:
MCR7
Description
HCAN sleep mode release by CAN bus operation disabled
HCAN sleep mode release by CAN bus operation enabled
Description
HCAN sleep mode released
Transition to HCAN sleep mode enabled
Description
Transmission order determined by message identifier priority (Initial value)
Transmission order determined by mailbox (buffer) number priority
(TXPR1 > TXPR15)
R/W
7
0
—
6
0
R
MCR5
R/W
5
0
—
4
0
R
—
3
0
R
MCR2
R/W
2
0
MCR1
R/W
1
0
(Initial value)
(Initial value)
MCR0
R/W
0
1