HD6432621 Hitachi, HD6432621 Datasheet - Page 607

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HD6432621

Manufacturer Part Number
HD6432621
Description
(HD64F262x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
Initialization (After Hardware Reset Only): These settings should be made while the HCAN is
in bit configuration mode.
IRR0 clearing
The reset interrupt flag (IRR0) is always set after a reset or recovery from software standby
mode. As an HCAN interrupt is initiated immediately when interrupts are enabled, IRR0
should be cleared.
Bit rate settings
Set values relating to the CAN bus communication speed and resynchronization. Refer to Bit
Rate and Bit Timing Settings in 15.3.2, Initialization after Hardware Reset, for details.
Mailbox transmit/receive settings
Mailbox transmit/receive settings should be made in advance. A total of 15 mailboxes can be
set for transmission or reception (mailboxes 1 to 15). To set a mailbox for transmission, clear
the corresponding bit to 0 in the mailbox configuration register (MBCR). Refer to Mailbox
transmit/receive settings in 15.3.2, Initialization after Hardware Reset, for details.
Mailbox initialization
As message control/data registers (MCx[x], MDx[x]) are configured in RAM, their initial
values after powering on are undefined, and so bit initialization is necessary. Write 0s or 1s to
the mailboxes. See Mailbox (Message Control/Data (MCx[x], MDx[x]) Initial Setting in
15.3.2, Initialization after a Hardware Reset, for details.
Message transmission method setting
Set the transmission method for mailboxes designated for transmission. The following two
transmission methods can be used. Refer to Message transmission method settings in 15.3.2,
Initialization after Hardware Reset, for details.
a. Transmission order determined by message identifier priority
b. Transmission order determined by mailbox number priority
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