HD6432621 Hitachi, HD6432621 Datasheet - Page 319

• Manufacturer Part Number: HD6432621
• Description: (HD64F262x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

Port F Data Register (PFDR)
PFDR is an 8-bit readable/writable register that stores output data for the port F pins (PF7 to PF0).
PFDR is initialized to H'00 by a reset, and in hardware standby mode. It retains its prior state in
software standby mode.
Bit 7 in PFDR is reserved, and only 0 may be written to it.
Port F Register (PORTF)
Note: * Determined by state of pins PF7 to PF0.
PORTF is an 8-bit read-only register that shows the pin states. It cannot be written to. Writing of
output data for the port F pins (PF7 to PF0) must always be performed on PFDR.
If a port F read is performed while PFDDR bits are set to 1, the PFDR values are read. If a port F
read is performed while PFDDR bits are cleared to 0, the pin states are read.
After a reset and in hardware standby mode, PORTF contents are determined by the pin states, as
PFDDR and PFDR are initialized. PORTF retains its prior state in software standby mode.
Bit
Initial value :
R/W
Bit
Initial value :
R/W
Mode 7
Setting a PFDDR bit to 1 makes the corresponding port F pin PF6 to PF0 an output port, or in
the case of pin PF7, the ø output pin. Clearing the bit to 0 makes the pin an input port.
:
:
:
:
R/W
PF7
—*
—
7
0
7
R
PF6DR
R/W
PF6
—*
6
0
6
R
PF5DR
R/W
PF5
—*
5
0
5
R
PF4DR
R/W
PF4
—*
4
0
4
R
PF3DR
R/W
PF3
—*
3
0
3
R
PF2DR
R/W
PF2
—*
2
0
2
R
PF1DR
R/W
PF1
—*
1
0
1
R
PF0DR
R/W
PF0
—*
0
0
0
R
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