HD6432621 Hitachi, HD6432621 Datasheet - Page 164

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HD6432621

Manufacturer Part Number
HD6432621
Description
(HD64F262x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
5.6.3
The interrupt controller has three main functions in DTC control.
(1) Selection of Interrupt Source: Interrupt sources can be specified as DTC activation requests
or CPU interrupt requests by means of the DTCE bit of DTCERA to DTCERG in the DTC.
After a DTC data transfer, the DTCE bit can be cleared to 0 and an interrupt request sent to the
CPU in accordance with the specification of the DISEL bit of MRB in the DTC.
When the DTC has performed the specified number of data transfers and the transfer counter value
is zero, the DTCE bit is cleared to 0 and an interrupt request is sent to the CPU after the DTC data
transfer.
(2) Determination of Priority: The DTC activation source is selected in accordance with the
default priority order, and is not affected by mask or priority levels. See section 8.3.3, DTC Vector
Table, for the respective priorities.
(3) Operation Order: If the same interrupt is selected as a DTC activation source and a CPU
interrupt source, the DTC data transfer is performed first, followed by CPU interrupt exception
handling.
Table 5-11 summarizes interrupt source selection and interrupt source clearance control according
to the settings of the DTCE bit of DTCERA to DTCERG in the DTC, and the DISEL bit of MRB
in the DTC.
120
On-chip
supporting
module
IRQ
interrupt
Operation
Interrupt source
clear signal
Interrupt
request
Interrupt controller
Figure 5-9 Interrupt Control for DTC
Selection
DTVECR
DTCER
circuit
Select
signal
clear signal
Clear signal
SWDTE
Determination of
Control logic
priority
CPU interrupt
request vector
number
DTC activation
request vector
number
Clear signal
I, I2 to I0
DTC
CPU

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