UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 1069

• Manufacturer Part Number: UPD70F3738GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3738GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

4th
Edition
Modification of 4.3.7 Port 9 (6)
Addition of Figure 4-32. Block Diagram of Type U-16
Addition of Note to Table 5-1. Bus Control Signals (When Multiplexed Bus Is Selected)
Addition of Note to Table 5-2. Bus Control Signals (When Separate Bus Is Selected)
Modification of Figure 5-16. Connecting SRAM with 8-bit Data Bus to V850ES/JG3-L via
8-bit Bus
Modification of Figure 5-17. Connecting Two SRAMs with 8-bit Data Bus to V850ES/JG3-
L via 16-bit Bus
Modification of Figure 5-18. Connecting SRAM with 16-bit Data Bus to V850ES/JG3-L via
16-bit Bus
Addition of 6.1 Overview
Modification of Figure 6-1. Clock Generator
Modification of 6.2 Configuration (1)
Addition of 6.2 Configuration (2)
Addition of 6.2 Configuration (8)
Addition of Caution to 6.3 Registers (2)
Modification of Table 6-1. Operation Status of Each Clock
Addition of 6.5.2 Registers (5)
Modification of Table 7-2. Pins Used by TMPn
Addition of CHAPTER 11 REAL-TIME COUNTER (
Addition of Remark to 16.1 Features
Addition of Remark to Figure 16-1. Block Diagram of UARTAn
Modification of Table 16-2. Pins Used by UARTA
Modification of 16.4 Registers (1)
Modification of 16.4 Registers (4)
Modification of 16.4 Registers (5)
Modification of 16.4 Registers (6)
Modification of 16.4 Registers (7)
Modification of 16.7 Dedicated Baud Rate Generator (2)
Modification of 16.7 Dedicated Baud Rate Generator (3)
Addition of CHAPTER 17 ASYNCHRONOUS SERIAL INTERFACE C (UARTC)
(
Modification of Table 18-2. Pins Used by CSIB
Modification of Table 20-2. DMA Start Factors
μ
PD70F3792, 70F3793)
APPENDIX E REVISION HISTORY
User’s Manual U18953EJ5V0UD
Description
μ
PD70F3792, 70F3793)
CHAPTER 4
PORT FUNCTIONS
CHAPTER 5
BUS CONTROL
FUNCTION
CHAPTER 6
CLOCK GENERATOR
CHAPTER 7 16-BIT
TIMER/EVENT
COUNTER P (TMP)
CHAPTER 11
REAL-TIME
COUNTER
CHAPTER 16
ASYNCHRONOUS
SERIAL INTERFACE
A (UARTA)
CHAPTER 17
ASYNCHRONOUS
SERIAL INTERFACE
C (UARTC)
CHAPTER 18
CLOCKED SERIAL
INTERFACE B
(CSIB)
CHAPTER 20 DMA
FUNCTION (DMA
CONTROLLER)
Applied to:
1067
(5/6)