UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 511

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UPD70F3738GF-GAS-AX

Manufacturer Part Number
UPD70F3738GF-GAS-AX
Description
MCU 32BIT V850ES/JX3-L 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet

Specifications of UPD70F3738GF-GAS-AX

Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3738GF-GAS-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Note Setting prohibited when 2.7 V ≤ AV
Remarks 1. Conversion time:
ADA0
FR2
0
0
0
0
1
1
1
1
Other than above
ADA0
FR1
0
0
1
1
0
0
1
1
2. For details about the operation timing, see 14.5.2 Conversion operation timing.
Table 14-3. Conversion Time Selection in High-Speed Conversion Mode (ADA0HS1 Bit = 1)
In the high-speed conversion mode, conversion is started after the stabilization time has elapsed after
the ADA0M0.ADA0CE bit is set to 1, and A/D conversion is performed only during the specified
conversion time (2.6 to 10.4
immediately after conversion ends.
In continuous conversion mode, the stabilization time is inserted only before the first conversion, and is
not inserted after the second conversion (the A/D converter continues running).
Stabilization time:
Trigger response time: If a software trigger, external trigger, or timer trigger is generated after the
Cautions 1. Set as 2.6
ADA0
FR0
0
1
0
1
0
1
0
1
26/f
52/f
78/f
104/f
130/f
156/f
182/f
208/f
(+ Stabilization Time)
2. In the high-speed conversion mode, rewriting the ADA0M0, ADA0M2, ADA0S,
XX
XX
XX
Conversion Time
XX
XX
XX
XX
XX
(+ 13/f
(+ 26/f
(+ 39/f
Set as 3.9
ADA0PFM, and ADA0PFT registers and inputting a trigger are prohibited during
the stabilization time.
(+ 50/f
(+ 50/f
(+ 50/f
(+ 50/f
(+ 50/f
XX
XX
XX
XX
XX
XX
XX
XX
)
)
)
)
)
)
)
)
Actual A/D conversion time (2.6 to 10.4
A/D converter setup time (1
stabilization time, it is inserted before the conversion time.
μ
μ
s ≤ conversion time ≤ 10.4
s ≤ conversion time ≤ 10.4
REF0
CHAPTER 14 A/D CONVERTER
μ
s). The A/D conversion end interrupt request signal (INTAD) is generated
User’s Manual U18953EJ5V0UD
< 3.0 V
Setting
prohibited
2.6
(+ 1.3
3.9
(+ 1.95
5.2
(+ 2.5
6.5
(+ 2.5
7.8
(+ 2.5
9.1
(+ 2.5
10.4
(+ 2.5
f
XX
= 20 MHz f
μ
μ
μ
μ
μ
μ
μ
s
s
s
s
s
s
Note
s
μ
μ
μ
μ
μ
μ
s)
μ
s)
s)
s)
s)
s)
s)
Setting
prohibited
3.25
(+ 1.625
4.875
(+ 2.438
6.5
(+ 3.125
8.125
(+ 3.125
9.75
(+ 3.125
Setting
prohibited
Setting
prohibited
XX
A/D Conversion Time
= 16 MHz f
μ
Setting prohibited
μ
s
μ
μ
μ
s
s
Note
s
s
μ
μ
μ
μ
μ
s)
s)
s)
s)
s)
μ
s or longer)
μ
μ
Setting
prohibited
4.333
(+ 2.167
6.5
(+ 3.25
8.667
(+ 4.167
Setting
prohibited
Setting
prohibited
Setting
prohibited
Setting
prohibited
s when 3.0 V ≤ AV
s when 2.7 V ≤ AV
XX
= 12 MHz f
μ
s
μ
μ
s
s
μ
μ
μ
μ
s)
s)
s)
s)
2.6
(+ 1.3
5.2
(+ 2.6
7.8
(+ 3.9
10.4
(+ 5
Setting
prohibited
Setting
prohibited
Setting
prohibited
Setting
prohibited
XX
= 10 MHz
μ
μ
μ
μ
μ
s
s
s
s)
Note
s
μ
μ
μ
s)
s)
s)
REF0
REF0
≤ 3.6 V.
< 3.0 V.
6.5
(+ 3.25
Setting
prohibited
Setting
prohibited
Setting
prohibited
Setting
prohibited
Setting
prohibited
Setting
prohibited
Setting
prohibited
f
XX
= 4 MHz
μ
s
μ
s)
3/f
3/f
3/f
3/f
3/f
3/f
3/f
3/f
Response
Trigger
XX
XX
XX
XX
XX
XX
XX
XX
Time
509

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