UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 917

• Manufacturer Part Number: UPD70F3738GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3738GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

30.4.5 Selection of communication mode
after switching to the flash memory programming mode. The FLMD0 pulse is generated by the dedicated flash
memory programmer.
In the V850ES/JG3-L, the communication mode is selected by inputting pulses (12 pulses max.) to the FLMD0 pin
The following shows the relationship between the number of pulses and the communication mode.
Note The number of clocks is as follows according to the communication mode.
0
8
9
11
12
Other
TXDA0 (output)
FLMD0 Pulse
RESET (input)
RXDA0 (input)
FLMD1 (input)
FLMD0 (input)
V
DD
UARTA0
CSIB0
CSIB3
CSIB0 + HS
CSIB3 + HS
RFU
V
V
V
V
V
V
V
V
V
V
V
V
DD
DD
DD
DD
DD
DD
SS
SS
SS
SS
SS
SS
Communication Mode
Power on
Figure 30-9. Selection of Communication Mode
CHAPTER 30 FLASH MEMORY
Reset
ends
User’s Manual U18953EJ5V0UD
Oscillation
stabilized
Communication rate: 9,600 bps (after reset), LSB first
V850ES/JG3-L performs slave operation, MSB first
V850ES/JG3-L performs slave operation, MSB first
V850ES/JG3-L performs slave operation, MSB first
V850ES/JG3-L performs slave operation, MSB first
Setting prohibited
Communication
mode selected
(Note)
Flash control command communication
Remarks
(erasure, write, etc.)
915