UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 432

• Manufacturer Part Number: UPD70F3738GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3738GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

430
Figure 8-64. Example of Using Software Processing to Resolve Problem When Capture Trigger Interval Is
(e) Clearing the overflow flag (TQ0OVF)
Note The overflow counter is set on the internal RAM by software.
<1> The TQ0CCRm register is read (the default value of the TIQ0m pin input is set).
<2> An overflow occurs. The overflow counter is incremented and the TQ0OVF bit is cleared to 0 in
<3> An overflow occurs a second time. The overflow counter is incremented and the TQ0OVF bit is
<4> The TQ0CCRm register is read.
The overflow flag (TQ0OVF) can be cleared to 0 by reading the TQ0OVF bit and, if its value is 1, either
clearing the bit to 0 by using the CLR1 instruction or by writing 8-bit data (with bit 0 as “0”) to the
TQ0OPT0 register.
TQ0CCRm register
INTTQ0OV signal
the overflow interrupt servicing.
cleared to 0 in the overflow interrupt servicing.
The overflow counter is read.
If the overflow counter is N, the pulse width can be calculated by (N × 10000H + D
In this example, because an overflow occurred twice, the pulse width is calculated as (20000H +
D
The overflow counter is cleared to 0H.
Remark
TIQ0m pin input
m1
16-bit counter
− D
TQ0OVF bit
counter
TQ0CE bit
Overflow
m0
FFFFH
0000H
).
m = 0 to 3
Note
CHAPTER 8 16-BIT TIMER/EVENT COUNTER Q (TMQ)
Long (When Using TIQ0m)
User’s Manual U18953EJ5V0UD
0H
D
m0
<1> <2>
1 cycle of 16-bit counter
Pulse width
D
1H
m0
<3> <4>
D
m1
2H 0H
D
m1
m1
− D
m0
).