UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 879

• Manufacturer Part Number: UPD70F3738GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3738GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

25.1 Functions
signal when oscillation of the main clock is stopped.
any means other than a reset.
Registers to Check Reset Source.
25.2 Configuration
The clock monitor monitors the main clock by using the internal oscillator clock and generates a reset request
Once the operation of the clock monitor has been enabled by an operation enable flag, it cannot be cleared to 0 by
When a reset by the clock monitor occurs, the RESF.CLMRF bit is set. For details on the RESF register, see 24.3
The clock monitor automatically stops under the following conditions.
• During oscillation stabilization time after STOP mode is released
• When the main clock is stopped (from when the PCC.MCK bit = 1 during subclock operation, until the PCC.CLS
• When the monitoring clock (internal oscillator clock) is stopped
• When the CPU operates with the internal oscillator clock
The clock monitor includes the following hardware.
Control register
Clock monitor operation enable signal
bit = 0 during main clock operation)
Main clock oscillation enable signal
Item
(CLM.CLME bit)
(PCC.MCK bit)
Figure 25-1. Block Diagram of Clock Monitor
Table 25-1. Configuration of Clock Monitor
CHAPTER 25 CLOCK MONITOR
Internal oscillator clock
Clock monitor mode register (CLM)
User’s Manual U18953EJ5V0UD
Operation
controller
mode
Main clock
oscillation monitor
Configuration
Main clock
Internal reset signal
877