UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 26

• Manufacturer Part Number: UPD70F3738GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3738GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

<R>
24
Part Number
Internal
memory
Memory
space
External bus interface
General-purpose register
Clock
I/O port
Timer
Real-time output port
10-bit A/D converter
8-bit D/A converter
Serial interface
DMA controller
Interrupt source
Power save function
Reset source
CRC function
On-chip debug
Operating power supply voltage
Operating ambient temperature
Package
Note The figure in parentheses indicates the number of external interrupts that can release STOP mode.
Main clock
(oscillation frequency)
Subclock
(oscillation frequency)
Internal oscillator
Minimum instruction
execution time
16-bit TMP
16-bit TMQ
16-bit TMM
Watch timer
RTC
WDT
Generic Name
Flash memory
RAM
Logical space
External memory area
External
Internal
μ
Address bus: 22
Address data bus: 16
Separate bus/multiplexed bus mode selectable
32 bits × 32 registers
Ceramic/crystal
(in PLL mode: f
External clock
(in PLL mode: f
Crystal (f
f
50 ns (main clock (f
I/O: 83 (5 V tolerant/N-ch
open-drain output selectable:
31)
CSIB:
UARTA/CSIB:
CSIB/I
UARTA/I
UARTA:
UARTC:
HALT/IDLE1/IDLE2/STOP/subclock/sub-IDLE/
low-voltage STOP/low-voltage subclock/low-voltage sub-IDLE mode
RTC backup mode
RESET pin input, watchdog timer 2 (WDT2), clock monitor (CLM), low-voltage detector (LVI)
16-bit error detection code generated for 8-bit unit data
MINICUBE
2.2 to 3.6 V @5 MHz, 2.7 to 3.6 V @20 MHz
2.0 to 3.6 V@2.5 MHz
−40 to +85°C
100-pin LQFP (14 × 14 mm)
121-pin FBGA (8×8 mm)
R
PD70F3792
= 220 kHz (TYP.)
384 KB
32 KB
4 channels (transfer target: on-chip peripheral I/O, internal RAM, external memory)
2
C bus:
Table 1-1. V850ES/Jx3-L Product List
2
XT
C bus: 2 channels
1 channel
®
= 32.768 kHz)
9 (9)
, MINICUBE2 supported
CHAPTER 1 INTRODUCTION
55
User’s Manual U18953EJ5V0UD
X
X
μ
Note
1 channel
3 channels
1 channel
1 channel
3 channels
= 2.5 to 5 MHz (multiplied by 4), in clock through mode: f
= 2.5 to 5 MHz (multiplied by 4), in clock through mode: f
PD70F3793
4 bits × 1 channel, 2 bits × 1 channel, or 6 bits × 1 channel
512 KB
XX
40 KB
) = 20 MHz)
V850ES/JG3-L
12 channels
6 channels
2 channels
1 channel
1 channel
1 channel
1 channel
μ
I/O: 84 (5 V tolerant/N-ch
open-drain output selectable:
31)
CSIB:
UARTA/CSIB:
CSIB/I
UARTA/I
100-pin LQFP (14 × 14 mm)
100-pin LQFP (14 × 20 mm)
121-pin FBGA (8 × 8 mm)
PD70F3737
128 KB
8 KB
2
C bus:
2
C bus: 2 channels
9 (9)
64 MB
15 MB
48
μ
Note
3 channels
1 channel
1 channel
PD70F3738
256 KB
16 KB
−
−
-
μ
I/O: 66 (5 V tolerant/N-ch
open-drain output selectable:
25)
CSIB:
UARTA:
CSIB/I
UARTA/I
80-pin LQFP (12 × 12 mm)
80-pin LQFP (14 × 14 mm)
Address bus: 18
Address data bus: 16
Multiplexed bus mode output
supported
PD70F3735
128 KB
8 KB
2
C bus:
V850ES/JF3-L
X
X
2
C bus: 1 channel
4 channels
8 channels
= 2.5 to 10 MHz)
= 2.5 to 5 MHz)
1 channel
1 channel
1 channel
1 channel
1 channel
9 (9)
40
μ
Note
2 channels
2 channels
1 channel
PD70F3736
256 KB
16 KB