UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 270

• Manufacturer Part Number: UPD70F3738GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3738GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

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An example of the register settings when the external event count mode is used is shown in the figure below.
TPnCTL0
TPnCTL1
TPnIOC0
TPnIOC2
(a) TMPn control register 0 (TPnCTL0)
(b) TMPn control register 1 (TPnCTL1)
(c) TMPn I/O control register 0 (TPnIOC0)
(d) TMPn I/O control register 2 (TPnIOC2)
Remark
TPnCE
0/1
0
0
0
n = 0 to 5
Figure 7-19. Register Settings in External Event Count Mode (1/2)
TPnEST
0
0
0
0
CHAPTER 7 16-BIT TIMER/EVENT COUNTER P (TMP)
TPnEEE
0
0
0
0
User’s Manual U18953EJ5V0UD
0
0
0
0
TPnEES1
TPnOL1
0/1
0
0
0
TPnCKS2 TPnCKS1 TPnCKS0
TPnEES0 TPnETS1 TPnETS0
TPnOE1 TPnOL0
TPnMD2 TPnMD1 TPnMD0
0/1
0
0
0
0
0
0
0
TPnOE0
0
0
0
1
0: Disable TOPn0 pin output
0: Disable TOPn1 pin output
These bits select the
valid edge of the external
event count input.
0: Stop counting
1: Enable counting
0, 0, 1:
External event count mode