UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 847

• Manufacturer Part Number: UPD70F3738GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3738GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

23.6.2 Releasing STOP mode/low-voltage STOP mode
INTWDT2 signal), unmasked external interrupt request signal (INTP0 to INTP7 pin input), unmasked internal interrupt
request signal from the peripheral functions operable in the STOP mode/low-voltage STOP mode, or reset signal
(reset by RESET pin input, WDT2RES signal, or low-voltage detector (LVI)).
oscillation stabilization time has been secured.
mode.
Reset
Non-maskable
interrupt request
signal (excluding
multiple interrupts)
Maskable interrupt
request signal
Release Source
The STOP mode/low-voltage STOP mode is released by a non-maskable interrupt request signal (NMI pin input,
After the STOP mode/low-voltage STOP mode has been released, the normal operation mode is restored after the
For re-set after releasing the low-voltage STOP mode, see 23.6.3 Re-setting after release of low-voltage STOP
(1) Releasing STOP mode by non-maskable interrupt request signal or unmasked maskable interrupt
Table 23-10. Operation After Releasing STOP Mode/Low-Voltage STOP Mode by Interrupt Request Signal
request signal
The STOP mode is released by a non-maskable interrupt request signal or an unmasked maskable interrupt
request signal, regardless of the priority of the interrupt request. If the STOP mode/low-voltage STOP mode is
set in an interrupt servicing routine, however, an interrupt request that is issued later is serviced as follows.
Caution An interrupt request signal that is disabled by setting the PSC.NMI2M, PSC.NMI0M, and
PSC.INTM bits to 1 (interrupt disabled) is invalid and cannot release the STOP mode/low-
voltage STOP mode.
Acknowledgment
Disabled (DI)
Enabled (EI)
Disabled (DI)
Enabled (EI)
Disabled (DI)
Enabled (EI)
Interrupt
Status
• An interrupt request with a
• An interrupt request with a
priority higher than that of
the release source is being
serviced.
priority lower than that of
the release source is being
serviced.
Status After Release
CHAPTER 23 STANDBY FUNCTION
User’s Manual U18953EJ5V0UD
−
−
−
Normal reset operation
The STOP mode/low-voltage STOP mode is released, and
after securing the oscillation stabilization time, the interrupt
request is acknowledged.
The STOP mode/low-voltage STOP mode is released but
the interrupt request that is the release source is not
acknowledged. The interrupt request itself is retained.
After securing the oscillation stabilization time, the
processing that was being executed before shifting to the
STOP mode/low-voltage STOP mode is executed.
The STOP mode/low-voltage STOP mode is released but
the interrupt request that is the release source is not
acknowledged. The interrupt request itself is retained.
After securing the oscillation stabilization time, the interrupt
servicing that was being executed before shifting to the
STOP mode/low-voltage STOP mode is executed.
The STOP mode/low-voltage STOP mode is released, and
after securing the oscillation stabilization time, the interrupt
request is acknowledged.
Operation After Release
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