UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 442

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UPD70F3738GF-GAS-AX

Manufacturer Part Number
UPD70F3738GF-GAS-AX
Description
MCU 32BIT V850ES/JX3-L 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet

Specifications of UPD70F3738GF-GAS-AX

Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3738GF-GAS-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
9.3
440
(1) TMM0 control register (TM0CTL0)
Registers
The TM0CTL0 register is an 8-bit register that controls the operation of TMM0.
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
Except for the TM0CE bit, the bits of the TM0CTL0 register cannot be rewritten to different values while TMM0
is operating (bits can be rewritten only to the same value as was previously specified).
TM0CTL0
After reset: 00H
Cautions 1. Set the TM0CKS2 to TM0CKS0 bits while TMM0 is stopped (TM0CE bit =
Remark
TM0CKS2
When the TM0CE bit is cleared to 0, the internal clock of TMM0 is disabled (fixed to
low level) and 16-bit counter is reset asynchronously.
TM0CE
TM0CE
<7>
0
1
0
0
0
0
1
1
1
1
2. Be sure to clear bits 3 to 6 to “0”.
f
f
f
INTWT: Watch timer interrupt request signal
CHAPTER 9 16-BIT INTERVAL TIMER M (TMM)
XX
R
XT
TM0CKS1
:
TMM0 operation disabled (16-bit counter reset asynchronously).
TMM0 operation enabled.
R/W
:
:
0). The TM0CKS2 to TM0CKS0 bits cannot be set at the same time as
changing the value of TM0CE from 0 to 1.
6
0
0
0
1
1
0
0
1
1
Main clock frequency
Internal oscillator clock frequency
Subclock frequency
Address: FFFFF690H
User’s Manual U18953EJ5V0UD
TM0CKS0
Internal clock operation enable/disable specification
5
0
0
1
0
1
0
1
0
1
f
f
f
f
f
INTWT
f
f
XX
XX
XX
XX
XX
R
XT
/8
4
0
/2
/4
/64
/512
3
0
Count clock selection
TM0CKS2 TM0CKS1 TM0CKS0
2
1
0

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