UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 742

• Manufacturer Part Number: UPD70F3738GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3738GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

19.14.2 When communication reservation function is disabled (IICFn.IICRSVn bit = 1)
request is rejected and a start condition is not generated. There are two modes in which the bus is not used by the
V850ES/JG3-L.
time shown in Table 19-7 is required until the STCFn flag is set after setting the STTn bit to 1. Therefore, secure the
time by software.
740
If the IICCn.STTn bit is set when the bus is not being used by the V850ES/JG3-L in a bus communication, this
• When arbitration results in the V850ES/JG3-L being neither the master nor a slave
• When an extension code is received and slave operation is disabled (ACK is not returned and the bus was
To confirm whether the start condition was generated or request was rejected, check the IICFn.STCFn flag. The
released when the IICCn.LRELn bit was set to 1) (n = 0 to 2).
OCKSENm
Remarks 1. ×: don’t care
1
1
1
1
0
2. n = 0 to 2
OCKSm1
m = 0, 1
0
0
1
1
0
OCKSm0
Table 19-7. Wait Periods
User’s Manual U18953EJ5V0UD
CHAPTER 19 I
0
1
0
1
0
CLn1
0
0
0
0
1
2
C BUS
CLn0
×
×
×
×
0
Wait Period
10 clocks
15 clocks
20 clocks
25 clocks
5 clocks