UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 510

• Manufacturer Part Number: UPD70F3738GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3738GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Note Setting prohibited when 2.7 V ≤ AV
Remarks 1. Stabilization time:
508
ADA0
FR2
Examples of the conversion time for each clock are shown below.
0
0
0
0
1
1
1
1
Other than above
ADA0
FR1
0
0
1
1
0
0
1
1
2. For details about the operation timing, see 14.5.2 Conversion operation timing.
Table 14-2. Conversion Time Selection in Normal Conversion Mode (ADA0HS1 Bit = 0)
In the normal conversion mode, conversion is started after the stabilization time has elapsed after the
ADA0M0.ADA0CE bit is set to 1, and A/D conversion is performed only during the specified conversion
time (2.6 to 10.4
request signal (INTAD) is generated after the wait time has elapsed.
Because conversion is stopped during the wait time, the operating current can be reduced.
Conversion time:
Wait time:
Trigger response time: If a software trigger is generated after the stabilization time, it is inserted before
Cautions 1. Set as 2.6
ADA0
FR0
0
1
0
1
0
1
0
1
66/f
131/f
196/f
259/f
311/f
363/f
415/f
467/f
+ Conversion Time + Wait Time
2. During A/D conversion, if the ADA0M0, ADA0M2, ADA0S, ADA0PFM, and ADA0PFT
XX
XX
XX
XX
XX
XX
XX
XX
(13/f
Set as 3.9
registers are written or a trigger is input, reconversion is carried out. However, if
the stabilization time end timing conflicts with writing to these registers, or if the
stabilization time end timing conflicts with the trigger input, the stabilization time
of 64 clocks is reinserted.
If a conflict occurs again with the reinserted stabilization time end timing, the
stabilization time is reinserted. Therefore do not set the trigger input interval and
control register write interval to 64 clocks or lower.
(26/f
(39/f
(50/f
(50/f
(50/f
(50/f
(50/f
Stabilization Time
μ
XX
s). Conversion stops after the conversion ends and the A/D conversion end interrupt
XX
XX
XX
XX
XX
XX
XX
+ 26/f
+ 52/f
+ 78/f
+ 104/f
+ 130/f
+ 156/f
+ 182/f
+ 208/f
A/D converter setup time (1
Actual A/D conversion time (2.6 to 10.4
Wait time inserted before the next conversion
the conversion time.
XX
μ
μ
XX
XX
s ≤ conversion time ≤ 10.4
s ≤ conversion time ≤ 10.4
+ 27/f
XX
XX
XX
XX
XX
REF0
+ 53/f
+ 79/f
CHAPTER 14 A/D CONVERTER
+ 105/f
+ 131/f
+ 157/f
+ 183/f
+ 209/f
User’s Manual U18953EJ5V0UD
< 3.0 V
XX
XX
XX
)
)
)
XX
XX
XX
XX
XX
)
)
)
)
)
f
Setting
prohibited
6.55
9.8
12.95
15.55
18.15
20.75
23.35
XX
= 20 MHz f
μ
A/D Conversion Time
μ
s
s
μ
μ
μ
μ
μ
Setting prohibited
Note
s
s
s
s
s
Setting
prohibited
8.19
12.25
16.19
19.44
22.69
Setting
prohibited
Setting
prohibited
μ
XX
s or longer)
= 16 MHz f
μ
μ
μ
s when 2.7 V ≤ AV
s when 3.0 V ≤ AV
μ
s
μ
μ
μ
Note
s
s
s
s
Setting
prohibited
10.92
16.33
21.58
Setting
prohibited
Setting
prohibited
Setting
prohibited
Setting
prohibited
XX
μ
= 12 MHz f
s)
μ
μ
μ
s
s
s
6.6
13.1
19.6
Setting
prohibited
Setting
prohibited
Setting
prohibited
Setting
prohibited
Setting
prohibited
XX
= 10 MHz f
REF0
REF0
μ
s
μ
μ
Note
s
s
≤ 3.6 V.
< 3.0 V.
16.5
Setting
prohibited
Setting
prohibited
Setting
prohibited
Setting
prohibited
Setting
prohibited
Setting
prohibited
Setting
prohibited
XX
= 4 MHz
μ
s
Response
3/f
3/f
3/f
3/f
3/f
3/f
3/f
3/f
Trigger
Time
XX
XX
XX
XX
XX
XX
XX
XX