UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 568

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UPD70F3738GF-GAS-AX

Manufacturer Part Number
UPD70F3738GF-GAS-AX
Description
MCU 32BIT V850ES/JX3-L 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet

Specifications of UPD70F3738GF-GAS-AX

Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3738GF-GAS-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
16.6.3 Continuous transmission procedure
UAnTX register is transferred to the UARTAn transmit shift register, the transmission enable interrupt request signal
(INTUAnT) is generated, and then shifting is started. After the transmission enable interrupt request signal (INTUAnT)
is generated, the next transmit data can be written to the UAnTX register. The timing of UARTAn transmit shift register
transmission can be judged from the transmission enable interrupt request signal (INTUAnT).
transfer.
566
Writing transmit data to the UAnTX register with transmission enabled triggers transmission. The data in the
An efficient communication rate is realized by writing the data to be transmitted next to the UAnTX register during
Caution When initializing transmission during the execution of continuous transmission, make sure that
Note Be sure to read the UAnSTR register after generation of the transmission enable interrupt request
the UAnSTR.UAnTSF bit is 0, then perform initialization. Transmit data that is initialized when the
UAnTSF bit is 1 cannot be guaranteed.
signal (INTUAnT) to check whether a transmission error has occurred.
CHAPTER 16 ASYNCHRONOUS SERIAL INTERFACE A (UARTA)
Figure 16-7. Continuous Transmission Processing
Occurrence of transmission
Required number of
writes performed?
Register settings
User’s Manual U18953EJ5V0UD
UAnTX write
interrupt?
Start
End
Yes
Yes
Note
No
No

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