UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 282

• Manufacturer Part Number: UPD70F3738GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3738GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

280
<1> Starting counting
<2> Changing the cycle
The TPnCCR1 register must
be written even when only
changing the cycle setting.
(TPnCKS0 to TPnCKS2 bits)
Set the TPnCCR0 register
Set the TPnCCR1 register
Remark
Figure 7-29. Timing and Processing of Operations in External Trigger Pulse Output Mode (2/2)
Set up the registers
TPnCCR0 register
TPnCCR1 register
TPnCTL0 register
TPnCTL1 register
TPnIOC0 register
TPnIOC2 register
TPnCE bit = 1
START
a = 0, 1
n = 0 to 5
CHAPTER 7 16-BIT TIMER/EVENT COUNTER P (TMP)
Be sure to set up these
registers before setting
the TPnCE bit to 1.
Counting starts.
The TPnCKS0 to
TPnCKS2 bits can
be set here.
Waiting for trigger
After setting these
registers, their values are
transferred to the CCRa
buffer registers when the
counter is cleared.
User’s Manual U18953EJ5V0UD
<3> Changing the duty
<4> Changing both the cycle and the duty
<5> Stopping counting
Only the TPnCCR1 register
has to be written when only
changing the duty setting.
When changing both the cycle and the
duty, do so in the order of cycle setting
then duty setting.
Set the TPnCCR1 register
Set the TPnCCR0 register
Set the TPnCCR1 register
TPnCE bit = 0
STOP
Disables counting.
After setting this register,
the values of the TPnCCRa
registers are transferred to
the CCRa buffer registers
when the counter is cleared.
After setting these registers,
their values are transferred
to the CCRa buffer registers
when the counter is cleared.