UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 706

• Manufacturer Part Number: UPD70F3738GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3738GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

19.6.2 Addresses
the master device via the bus lines. Therefore, each slave device connected via the bus lines must have a unique
address.
data matches the data values stored in the SVAn register. If the address data matches the values of the SVAn register,
the slave device is selected and communicates with the master device until the master device generates a start
condition or stop condition (n = 0 to 2).
direction specification below, are written together to IIC shift register n (IICn) and then output. Received addresses
are written to the IICn register (n = 0 to 2).
704
The 7 bits of data that follow the start condition are defined as an address.
An address is a 7-bit data segment that is output in order to select one of the slave devices that are connected to
The slave devices include hardware that detects the start condition and checks whether or not the 7-bit address
The slave address and the eighth bit, which specifies the transfer direction as described in 19.6.3 Transfer
The slave address is assigned to the higher 7 bits of the IICn register.
Note The interrupt request signal (INTIICn) is generated if a local address or extension code is received
Remark
during slave device operation.
n = 0 to 2
INTIICn
SDA0n
SCL0n
AD6
1
AD5
2
User’s Manual U18953EJ5V0UD
Figure 19-9. Address
CHAPTER 19 I
AD4
3
Address
AD3
4
AD2
2
C BUS
5
AD1
6
AD0
7
R/W
8
9
Note