IPR-PCIE/8 Altera, IPR-PCIE/8 Datasheet - Page 186

• Manufacturer Part Number: IPR-PCIE/8
• Description: IP CORE Renewal Of IP-PCIE/8
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-PCIE/8

• Software Application: IP CORE, Interface And Protocols, PCI
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: PCI Express Compiler, x8 Link Width
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

BFM Procedures and Functions
5–36
PCI Express Compiler User Guide
Syntax
Arguments
Table 5–20. ebfm_barrd_wait Procedure
ebfm_barrd_wait(bar_table, bar_num, pcie_offset, lcladdr,
byte_len, tclass)
bar_table
bar_num
pcie_offset
lcladdr
byte_len
tclass
ebfm_barrd_wait Procedure
The ebfm_barrd_wait procedure reads a block of data from the offset
of the specified endpoint BAR and stores it in BFM shared memory. The
length can be longer than the configured maximum read request size; the
procedure breaks the request up into multiple transactions as needed.
This procedure waits until all of the completion data is returned and
places it in shared memory.
PCI Express Compiler Version 6.1
Address of the endpoint bar_table structure in BFM shared memory
Number of the BAR used with
Express address
Address offset from the BAR base
BFM shared memory address where the read data is stored
Length, in bytes, of the data to be read. Can be 1 to the minimum of
the bytes remaining in the BAR space or BFM shared memory
Traffic class used for the PCI Express transaction
pcie_offset
to determine PCI
Altera Corporation
December 2006