IPR-PCIE/8 Altera, IPR-PCIE/8 Datasheet - Page 39

• Manufacturer Part Number: IPR-PCIE/8
• Description: IP CORE Renewal Of IP-PCIE/8
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-PCIE/8

• Software Application: IP CORE, Interface And Protocols, PCI
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: PCI Express Compiler, x8 Link Width
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

Functional
Description
Figure 3–1. The MegaCore Function’s Three Layers
Altera Corporation
December 2006
tx_ d esc
tx _d ata
rx_ d esc
rx _d ata
Towards Application Layer
PCI Express MegaCore Function
With information sent
by the application
layer, the transaction
layer generates a TLP,
which includes a
header and, optionally,
a data payload.
The transaction layer
disassembles the
transaction and
transfers data to the
application layer in a
form that it recognizes.
Transaction Layer
Figure 3–1
MegaCore function.
The PCI Express MegaCore functions comply with the PCI Express Base
Specification 1.1 or the PCI Express Base Specification Revision 1.0a, and
implements all three layers of the specification:
■
■
Transaction Layer—The transaction layer contains the configuration
space, which manages communication with the your application
layer: the receive and transmit channels, the receive buffer, and flow
control credits.
Data Link Layer—The data link layer, located between the physical
layer and the transaction layer, manages packet transmission and
maintains data integrity at the link level. Specifically, the data link
layer:
●
●
PCI Express Compiler Version 6.1
Manages transmission and reception of data link layer packets
Generates all transmission cyclical redundancy code (CRC)
checks and checks all CRCs during reception
broadly describes the roles of each layer of the PCI Express
The data link layer
ensures packet
integrity, and adds a
sequence number and
link cyclic redundancy
code (LCRC) check to
the packet.
The data link layer
verifies the packet's
sequence number and
checks for errors.
Data Link Layer
3. Specifications
The physical layer
encodes the packet
and transmits it to the
receiving device on the
other side of the link.
The physical layer
decodes the packet
and transfers it to the
data link layer.
Physical Layer
Towards Link
Preliminary
Tx
Rx
3–1