IPR-PCIE/8 Altera, IPR-PCIE/8 Datasheet - Page 237

IP CORE Renewal Of IP-PCIE/8

IPR-PCIE/8

Manufacturer Part Number
IPR-PCIE/8
Description
IP CORE Renewal Of IP-PCIE/8
Manufacturer
Altera
Type
MegaCorer
Datasheets

Specifications of IPR-PCIE/8

Software Application
IP CORE, Interface And Protocols, PCI
Supported Families
Arria GX, Cyclone II, HardCopy II, Stratix II
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Rohs Compliant
NA
Function
PCI Express Compiler, x8 Link Width
License
Renewal License
Lead Free Status / RoHS Status
na
Lead Free Status / RoHS Status
na
Altera Corporation
December 2006
tlp_emp
tlp_val
txbk_sm
rx_sub
tx_sub
Table C–1. test_out Signals for the x1 and x4 MegaCore Functions (Part 6 of 17)
Signal
TRN rxvc
TRN rxvc
TRN txvc
TRN rxfc
TRN txfc
Subblock
138
139
143:140
199:144
255:200
PCI Express Compiler Version 6.1
Bit
Receive transaction layer packet FIFO empty flag. This signal
reports that the transaction layer packet FIFO is empty.
Receive transaction layer packet pending in normal queue. This
signal reports that a transaction layer packet has been
extracted from the transaction layer packet FIFO, but is still
pending for transmission to the application layer.
Transmit state machine. Transmit state machine encoding:
Receive flow control credits. Receive buffer current credits
available:
Flow control credits for NPD is limited to 8 bits due to the fact
that more NPD credits than NPH credits is meaningless.
Transmit flow control credits. Transmit buffer current credits
available:
Flow control credits for NPD is limited to 8 bits due to the fact
that more NPD credits than NPH credits is meaningless.
0000: idle
0001: desc4dw
0010: desc3dw_norm
0011: desc3dw_shft
0100: data_norm
0101: data_shft
0110: data_last
0111: config0
1000: config1
others: reserved
bit [7:0]: Posted Header (PH)
bit [19:8]: Posted Data (PD)
bit [27:20]: Non-Posted Header (NPH)
bit [35:28]: Non-Posted Data (NPD)
bit [43:36]: Completion Header (CPLH)
bit [55:44]: Completion Data (CPLD)
bit [7:0]: Posted Header (PH)
bit [19:8]: Posted Data (PD)
bit [27:20]: Non-Posted Header (NPH)
bit [35:28]: Non-Posted Data (NPD)
bit [43:36]: Completion Header (CPLH)
bit [55:44]: Completion Data (CPLD)
Description
PCI Express Compiler User Guide
C–7

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