IPR-PCIE/8 Altera, IPR-PCIE/8 Datasheet - Page 77

• Manufacturer Part Number: IPR-PCIE/8
• Description: IP CORE Renewal Of IP-PCIE/8
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-PCIE/8

• Software Application: IP CORE, Interface And Protocols, PCI
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: PCI Express Compiler, x8 Link Width
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

Specifications
Altera Corporation
December 2006
Desired performance
for received requests
Table 3–20. Buffer Setup Page Parameters (Part 2 of 3)
Parameter
Low, Medium,
High, Maximum
Value
PCI Express Compiler Version 6.1
Specify how to configure the Rx Buffer size and the flow control
credits.
●
●
●
●
Low—Provides the minimal amount of space for desired traffic.
Select this option when the throughput of the received requests is
not critical to the system design. Doing this will minimize the device
resource utilization.
Medium—Provides a moderate amount of space for received
requests. Select this option when the received request traffic does
not need to use the full link bandwidth, but is expected to
occasionally use bursts of a couple maximum sized payload
packets.
High—Provides enough buffer space to maintain full link bandwidth
of received requests with typical external link delays and FC
Update processing delays by the attached PCI Express port. Use
this setting in most circumstances where full link bandwidth is
needed. This is the default.
Maximum—Provides additional space to allow for additional
external delays (link side and application side) and still allows full
throughput.
If you need more buffer space than this parameter supplies, select
a larger payload size and this setting. Doing this increases the
buffer size and slightly increase the number of logic elements (LEs)
to support a larger Payload size than will be used.
For more information, see data credits in the section,
Throughput” on page
3–11.
Description
PCI Express Compiler User Guide
“Analyzing
3–39