IPR-PCIE/8 Altera, IPR-PCIE/8 Datasheet - Page 92

• Manufacturer Part Number: IPR-PCIE/8
• Description: IP CORE Renewal Of IP-PCIE/8
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-PCIE/8

• Software Application: IP CORE, Interface And Protocols, PCI
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: PCI Express Compiler, x8 Link Width
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

Signals
Figure 3–15. State Machine Is Busy with the Preceding Transaction Layer Packet Waveform
3–54
PCI Express Compiler User Guide
Descriptor
Signals
Signals
Data
tx_desc[127:0]
tx_data[63:32]
tx_data[31:0]
tx_ack
tx_req
tx_ws
tx_err
tx_dfr
tx_dv
Transaction Layer Not Ready to Accept Packet
In this example, the application transmits a 64-bit memory read
transaction of 6 DWORDs. Address bit 2 is set to 0. See
Data transmission cannot begin if the MegaCore function’s transaction
layer state machine is still busy transmitting the previous packet, as is the
case in this example.
1
PCI Express Compiler Version 6.1
2
3
MEMRD64
4
5
6
Clock Cycles
7
8
9
10
11
12
13
Altera Corporation
Figure
14
December 2006
15
3–15.