IPR-PCIE/8 Altera, IPR-PCIE/8 Datasheet - Page 249

• Manufacturer Part Number: IPR-PCIE/8
• Description: IP CORE Renewal Of IP-PCIE/8
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-PCIE/8

• Software Application: IP CORE, Interface And Protocols, PCI
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: PCI Express Compiler, x8 Link Width
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

Test-Out
Interface
Signals for x8
MegaCore
Functions
Altera Corporation
December 2006
ltssm_r
rxl0s_sm
Table C–2. test_out Signals for the x8 MegaCore Functions (Part 1 of 4)
Signal
MAC
ltssm
MAC
ltssm
Subblock
Table C–2
functions.
PCI Express Compiler Version 6.1
4:0
6:5
describes the test-out signals for the x8 MegaCore
Bit
LTSSM state: LTSSM state encoding:
Receive L0s state: Receive L0s state machine
00000: detect.quiet
00001: detect.active
00010: polling.active
00011: polling.compliance
00100: polling.configuration
00110: config.linkwidthstart
00111: config.linkaccept
01000: config.lanenumaccept
01001: config.lanenumwait
01010: config.complete
01011: config.idle
01100: recovery.rcvlock
01101: recovery.rcvconfig
01110: recovery.idle
01111: L0
10000: disable
10001: loopback.entry
10010: loopback.active
10011: loopback.exit
10100: Hot reset
10101: L0s
10110: L1.entry
10111: L1.idle
11000: L2.idle
11001: L2 transmit.wake
00: inact
01: idle
10: fts
11: out.recovery
PCI Express Compiler User Guide
Description
C–19