peb2255 Infineon Technologies Corporation, peb2255 Datasheet - Page 170

• Manufacturer Part Number: peb2255
• Description: E1/t1/j1 Framer And Line Interface Component For Long And Short Haul Applications
• Manufacturer: Infineon Technologies Corporation

8.1.3
Characteristics: FLAG and CRC generation/check, bit-stuffing
No address recognition is performed and each frame is stored in the RFIFO.
8.1.4
The following figure gives an overview of the management of the received HDLC frames
in the different operating modes.
Figure 56
Data Sheet
Description of Symbols:
MODE.MDS(2:0)
0
0
1
1
1
1
0
0
Transparent Mode 0 (MODE.MDS2...0 = 100)
Receive Data Flow
compared with register
stored in FIFO or register
1
0
1 Transparent 1
0 Transparent 0
HDLC Receive Data Flow of FALC
Non-Auto/16
Non-Auto/8
FLAG
RAH1,2 RAL1,2
RAH1,2
RAH1,2
2)
2)
2)
ADDR
2)
X
In case of 8-bit address the
control field starts here
1) CRC is optionally stored in RFIFO if CCR3.RCRC = 1
2) Address is optionally stored in RFIFO if CCR3.RADD = 1
CTRL
170
Signaling Controller Operating Modes
DATA
®
-LH
RFIFO
RFIFO
RFIFO
RFIFO
1)
1)
1)
1)
RSIS
RSIS
RSIS
RSIS
CRC
FALC-LH V1.3
FLAG
F0225
PEB 2255
2000-07