peb2255 Infineon Technologies Corporation, peb2255 Datasheet - Page 325

• Manufacturer Part Number: peb2255
• Description: E1/t1/j1 Framer And Line Interface Component For Long And Short Haul Applications
• Manufacturer: Infineon Technologies Corporation

Receive Byte Count Low (Read)
Together with RBCH (bits RBC11...8), indicates the length of a received frame (1 4095
bytes). Bits RBC4...0 indicate the number of valid bytes currently in RFIFO. These
registers must be read by the CPU following a RME interrupt.
Received Byte Count High (Read)
OV…
RBC11...8
Interrupt Status Register 0 (Read)
Value after RESET: 00
All bits are reset when ISR0 is read.
If bit IPC.VIS is set, interrupt statuses in ISR0 may be flagged although they are masked
via register IMR0. However, these masked interrupt statuses neither generate a signal
on INT, nor are visible in register GIS.
RME…
Data Sheet
RBCH
RBCL
ISR0
RBC7
RME
7
7
7
More than 4095 bytes received.
Receive Byte Count (most significant bits)
Together with RBCL (bits RBC7 0) indicate the length of the
received frame.
One complete message of length less than 32 bytes, or the last part
of a frame at least 32 bytes long is stored in the receive FIFO,
including the status byte.
Counter Overflow
Receive Message End
RFS
H
ISF
RMB
OV
325
RBC11
RSC
RBC10
CRC6
PDEN
RBC9
FALC-LH V1.3
T1/J1 Registers
RBC0
RBC8
RPF
0
0
0
PEB 2255
2000-07
(66)
(67)
(68)