peb2255 Infineon Technologies Corporation, peb2255 Datasheet - Page 279

• Manufacturer Part Number: peb2255
• Description: E1/t1/j1 Framer And Line Interface Component For Long And Short Haul Applications
• Manufacturer: Infineon Technologies Corporation

RTM…
ECLB…
CLA4…0…
Framer Mode Register 4 (Read/Write)
Value after RESET: 00
AIS3…
Data Sheet
FMR4
AIS3
7
Setting this bit disconnects control of the internal elastic store from the
receiver. The elastic store is now in a “free running” mode without any
possibility to update the time slot assignment to a new frame position
in case of re-synchronization of the receiver. This function can be
used in conjunction with the “disable AIS to system interface” feature
(FMR2.DAIS) to realize undisturbed transparent reception.
This bit should be enabled in case of unframed data reception mode.
After resetting RTM to 0, the elastic buffer is adjusted after the next
resynchronization.
0…
1…
CLA = 1…24 selects the channel.
During loop back, the contents of the associated outgoing channel on
ports XL1/XDOP/XOID and XL2/XDON is equal to the idle channel
code programmed in register IDLE.
Select AIS Condition
0…
1…
Receive Transparent Mode
Enable Channel Loop Back
Channel Address For Loop Back
TM
H
Disables the channel loop back.
Enables the channel loop back selected by this register.
AIS (blue alarm) is indicated (FRS0.AIS) when two or less
zeros in the received bit stream are detected in a time interval
of 12 frames (F4, F12, F72) or 24 frames (ESF).
AIS (blue alarm) detection is only enabled when FALC
in asynchronous state. The alarm is indicated (FRS0.AIS) when
– three or less zeros within a time interval of 12 frames (F4,
– five or less zeros within a time interval of 24 frames (ESF)
F12, F72), or
are detected in the received bit stream.
XRA
SSC1
279
SSC0
AUTO
FM1
FALC-LH V1.3
T1/J1 Registers
FM0
0
PEB 2255
2000-07
®
(1E)
-LH is