peb2255 Infineon Technologies Corporation, peb2255 Datasheet - Page 222

• Manufacturer Part Number: peb2255
• Description: E1/t1/j1 Framer And Line Interface Component For Long And Short Haul Applications
• Manufacturer: Infineon Technologies Corporation

SXSC…
XBS1...0…
Data Sheet
Select Transmit System Clock
0…
1…
Transmit Buffer Size
00… By-pass of transmit elastic store
01… buffer size : 1 frame
10… buffer size : 2 frames
11… buffer size : 92 bits
expected frequency on pin SCLKX: 8.192 MHz
Calculation of delay time T (SCLKX cycles) depends on the
value X of the “Transmit Counter Offset” register XC1/0 and of
the programming of XC1.XCOS:
Delay T is an even number in the range of 0 to 1022:
XCOS = 0: X = 498
expected frequency on pin SCLKX: 2.048 MHz
Calculation of delay time T (SCLKX cycles) depends on the
value X of the “Transmit Counter Offset” register XC1/0:
T = (507
Delay time T = time between beginning of time slot 0 at XDI and
the initial edge of SCLKX after SYPX goes active.
If this bit is set FMR1.IMOD must be set also and bit XC0.0
must be cleared.
Delay T is an odd number in the range of 1 to 1023:
XCOS = 1: X = 498
X = 1010
X = 1010
x/2) mod 256
222
T/2 if
T/2 if
(T
(T
1)/2 if
1)/2 if
998
0
T
999
1
T
996
T
1022
T
997
1023
FALC-LH V1.3
E1 Registers
PEB 2255
2000-07