peb2255 Infineon Technologies Corporation, peb2255 Datasheet - Page 321

• Manufacturer Part Number: peb2255
• Description: E1/t1/j1 Framer And Line Interface Component For Long And Short Haul Applications
• Manufacturer: Infineon Technologies Corporation

Receive DL-Bit Register 1 (Read)
RDL17…10…
Receive DL-Bit Register 2 (Read)
RDL27…20…
Receive DL-Bit Register 3 (Read)
RDL37…30…
Data Sheet
RDL1
RDL2
RDL3
RDL17
RDL27
RDL37
7
7
7
Receive DL-Bit
Only valid if F12, F24 or F72 format is enabled.
The received FS/DL-Bits are shifted into this register. RDL10 is
received in frame 1 and RDL17 in frame 15, if F24 format is enabled.
RDL10 is received in frame 26 and RDL17 in frame 40, if F72 format
is enabled.
In F12 format the FS-Bits of a complete multiframe is stored in this
register. RDL10 is received in frame 2 and RDL15 in frame 12.
This register is updated with every receive multiframe begin interrupt
ISR0.RMB.
Receive DL-Bit
Only valid if F24 or F72 format is enabled.
The received DL-Bits are shifted into this register. RDL20 is received
in frame 17 and RDL23 in frame 23, if F24 format is enabled. RDL20
is received in frame 42 and RDL27 in frame 56, if F72 format is
enabled.
This register is updated with every receive multiframe begin interrupt
ISR0.RMB.
Receive DL-Bit
Only valid if F72 format is enabled.
The received DL-Bits are shifted into this register. RDL30 is received
in frame 58 and RDL37 in frame 72, if F72 format is enabled.
RDL16
RDL26
RDL15
RDL25
RDL14
RDL24
321
RDL13
RDL23
RDL12
RDL22
RDL11
RDL21
FALC-LH V1.3
T1/J1 Registers
RDL10
RDL20
RDL30
0
0
0
PEB 2255
2000-07
(5C)
(5D)
(5E)