peb2255 Infineon Technologies Corporation, peb2255 Datasheet - Page 29

• Manufacturer Part Number: peb2255
• Description: E1/t1/j1 Framer And Line Interface Component For Long And Short Haul Applications
• Manufacturer: Infineon Technologies Corporation

Table 2
Pin No.
4
Data Sheet
Symbol
RL2
RDIN
RCLKI
Pin Definitions - Line Interface (cont’d)
Input (I)
Output (O)
Supply (S)
I (analog)
I
I
Function
Line Receiver 2
Analog Input from the external transformer.
Selected if LIM1.DRS = 0.
Receive Data Input Negative
Input for received dual rail PCM(-) route signal
which will be latched with the internal generated
Receive Route Clock. An internal DPLL will
extract the Receive Route Clock from the
incoming data pulse. The duty cycle of the
received signal has to be close to 50%.
The dual rail mode is selected if LIM1.DRS = 1
and FMR0.RC1 = 1. Input polarity is selected by
bit RC0.RDIS (after reset: active low).
Receive Clock Input
Receive clock input for the optical interface if
LIM1.DRS = 1 and FMR0.RC1/0 = 00.
Clock frequency: 2048 kHz (E1) or 1544 kHz
(T1/J1).
29
Pin Descriptions
FALC-LH V1.3
PEB 2255
2000-07