peb2255 Infineon Technologies Corporation, peb2255 Datasheet - Page 334

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peb2255

Manufacturer Part Number
peb2255
Description
E1/t1/j1 Framer And Line Interface Component For Long And Short Haul Applications
Manufacturer
Infineon Technologies Corporation
Datasheet

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Receive Signaling Register 1...12
Each register contains the received bit-robbing information for 8 DS0 channels. The
received robbed-bit signaling information of a complete ESF multiframe is compared with
the previously received one. In F12/72 frame format the received signaling information of
every 24 frames are compared with the previously received 24 frames. If the contents
changed a receive signaling change interrupt ISR0.RSC is generated and informs the
user that a new multiframe has to be read within the next 3 ms. Received data is stored
in registers RS1...12. RS1.7 is received in channel 1 frame 1 and RS12.0 in channel 24
frame 24 (ESF).
If requests for reading the RS1...12 registers is ignored the received data may be lost.
Additionally a receive signaling data change pointer indicates an update of register
RS1...12. Refer also to register RSP1/2.
Access to RS1...12 registers is only valid if the serial receive signaling access on the
system highway is disabled.
Data Sheet
334
FALC-LH V1.3
T1/J1 Registers
PEB 2255
2000-07

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