peb2255 Infineon Technologies Corporation, peb2255 Datasheet - Page 31
peb2255
Manufacturer Part Number
peb2255
Description
E1/t1/j1 Framer And Line Interface Component For Long And Short Haul Applications
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEB2255.pdf
(374 pages)
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Table 2
Pin No.
17
13
12
Data Sheet
Symbol
XL1M
XL2
XDON
XL2M
Pin Definitions - Line Interface (cont’d)
Input (I)
Output (O)
Supply (S)
I
O (analog)
O
I
Function
Transmit Line 1 Monitor
Analog input from external transmit transformer
(XL1). This pin must be connected, otherwise
pin XL1 could be set into high impedance state
automatically. If digital line interface mode is
selected (LIM1.DRS = 1), this input has to be
connected to V
Transmit Line 2
Analog output for the external transformer.
Selected if LIM1.DRS = 0. After reset this pin is
in a high impedance state until bit FMR0.XC1 is
set.
Transmit Data Output Negative
This digital output for transmitted dual rail
PCM(-) route signals can provide
- half bauded signals with 50% duty cycle
(LIM0.XFB = 0) or
- full bauded signals with 100% duty cycle
(LIM0.XFB = 1)
The data will be clocked off on the positive
transitions of XCLK in both cases. Output
polarity is selected by bit LIM0.XDOS (after
reset: active low).
The dual rail mode is selected if LIM1.DRS = 1
and FMR0.XC1 = 1. After reset this pin is in a
high impedance state until register LIM1.DRS is
set.
Transmit Line 2 Monitor
Analog input from external transmit transformer
(XL2). This pin must be connected, otherwise
pin XL2 could be set into high impedance state
automatically. If digital line interface mode is
selected (LIM1.DRS = 1), this input has to be
connected to V
31
SSX
SSX
.
.
Pin Descriptions
FALC-LH V1.3
PEB 2255
2000-07
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