peb2255 Infineon Technologies Corporation, peb2255 Datasheet - Page 271

• Manufacturer Part Number: peb2255
• Description: E1/t1/j1 Framer And Line Interface Component For Long And Short Haul Applications
• Manufacturer: Infineon Technologies Corporation

Transmit Timeslot Register 1...4 (Read/Write)
Value after RESET: 00
TS0…TS31…
Data Sheet
TTR1
TTR2
TTR3
TTR4
TS16
TS24
TS0
TS8
7
Transmit Timeslot Register
These bits define the transmit time slots on the system highway to be
inserted. Additionally these registers control the XSIGM marker which
can be forced high during the respective time slots independently of
bit CCR1.EITS.
A one in the TTR1...4 bits inserts the corresponding time slot sourced
by the XFIFO in the data received on pin XDI, if bit CCR1.EITS is set.
If SIC3.TTRF is set and CCR1.EDLX/EITS=00, insertion of data
received on port XSIG is controlled by this registers.
Assignments:
SIC1.SRSC = 0 : ( SCLKR = 8.192 MHz)
TS0
…
TS31
SIC1.SRSC = 1 : ( SCLKR = 1.544 MHz)
TS0
…
TS23
0
1…
outgoing data stream from XFIFO. This function is activated only, if bit
CCR1.EITS is set.
The corresponding time slot is forced high on marker pin XSIGM.
TS17
TS25
TS1
TS9
H
, 00
normal operation
The contents of the selected time slot is inserted into the
time slot 0
time slot 31
time slot 1
time slot 24
H
TS10
TS18
TS26
TS2
, 00
H
, 00
TS11
TS19
TS27
TS3
H
271
TS12
TS20
TS28
TS4
TS13
TS21
TS29
TS5
TS14
TS22
TS30
TS6
FALC-LH V1.3
T1/J1 Registers
TS15
TS23
TS31
TS7
0
PEB 2255
2000-07
(10)
(11)
(12)
(13)