peb2255 Infineon Technologies Corporation, peb2255 Datasheet - Page 82

• Manufacturer Part Number: peb2255
• Description: E1/t1/j1 Framer And Line Interface Component For Long And Short Haul Applications
• Manufacturer: Infineon Technologies Corporation

4.4
4.4.1
Bit: FMR1.PMOD = 0
PCM line bit rate
Single frame length
Framing frequency
HDLC controller
Organization
The operating mode of the FALC
and characteristics, line code, multiframe structure, and signaling scheme.
The FALC
(CEPT, 2.048 Mbit/s) carriers. The internal HDLC- or CAS Controller supports all
signaling procedures including signaling frame synchronization/synthesis and signaling
alarm detection in all framing formats. The time slot assignment from the PCM line to the
system highway and vice versa. is performed without any changes of numbering (TS0
Summary of E1- Framing Modes
• Doubleframe format according to ITU-T G. 704
• Multiframe format according to ITU-T G. 704
• CRC4 processing according to ITU-T G. 706
• Multiframe format with CRC4 to non CRC4 interworking according to ITU-T G. 706
• Multiframe format with modified CRC4 to non CRC4 interworking
• Multiframe format with CRC4 performance monitoring
After RESET, the FALC
Switching between the framing formats is done via bit FMR2.RFS1/0 and FMR3.EXTIW
for the receiver and FMR1.XFS for the transmitter.
Data Sheet
TS0, … , TS31
®
Framer Operating Modes (E1)
General
-LH implements all of the standard framing structures for E1 or PCM 30
TS31).
:
:
:
:
:
2.048 Mbit/s
256 bit, No. 1 … 256
8 kHz
nx64 kbit/s, n = 1...32 or nx4 kbit/s, n=1...5
32 time slots, No. 0 … 31
with 8 bits each, No. 1 … 8
®
-LH is switched into doubleframe format automatically.
®
-LH is selected by programming the carrier data rate
82
Functional Description E1
FALC-LH V1.3
PEB 2255
2000-07