peb2255 Infineon Technologies Corporation, peb2255 Datasheet - Page 246

• Manufacturer Part Number: peb2255
• Description: E1/t1/j1 Framer And Line Interface Component For Long And Short Haul Applications
• Manufacturer: Infineon Technologies Corporation

S_A…
S_8…
Signaling Status Register (Read)
XDOV…
XFW…
XREP…
RLI…
CEC…
SFS…
Data Sheet
SIS
XDOV
7
Receive Sa6-Bit Status: “1010”
Receive SA6-bit status “1010” is detected for three times in a row in
the SA6-bit positions.
Receive Sa6-Bit Status: “1000”
Receive SA6-bit status “1000” is detected for three times in a row in
the SA6-bit positions.
More than 32 bytes have been written to the XFIFO.
This bit is reset by:
– a transmitter reset command XRES
– or when all bytes in the accessible half of the XFIFO have been
Transmit FIFO Write Enable
Data can be written to the XFIFO.
Status indication of CMDR.XREP.
Receive Line Inactive
Neither FLAGs as Interframe Time Fill nor frames are received via the
signaling timeslot.
Note: CEC is active at most 2.5 periods of the current system data
Status Freeze Signaling
0…
1…
Transmit Data Overflow
Transmission Repeat
Command Executing
0…
1…
XFW
moved in the inaccessible half.
No command is currently executed, the CMDR register can be
written to.
A command (written previously to CMDR) is currently executed,
no further command can be temporarily written in CMDR
register.
freeze signaling status inactive.
freeze signaling status active
rate.
XREP
246
RLI
CEC
SFS
FALC-LH V1.3
E1 Registers
0
PEB 2255
2000-07
(64)