MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 162

• Manufacturer Part Number: MMC2114CFCAG33
• Description: IC MCU 32BIT 33MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2114CFCAG33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 67
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: MMC2114
• Core: M-CORE
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 104
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Controller Family/series: MCORE
• No. Of I/o's: 104
• Ram Memory Size: 32KB
• Cpu Speed: 33MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Power Management
6.4.11 Programmable Interrupt Timers (PIT1 and PIT2)
6.4.12 Serial Peripheral Interface (SPI)
6.4.13 Serial Communication Interfaces (SCI1 and SCI2)
Advance Information
162
In stop mode (or in doze mode, if so programmed), the programmable
interrupt timer (PIT) ceases operation, and freezes at the current value.
When exiting these modes, the PIT resumes operation from the stopped
value. It is the responsibility of software to avoid erroneous operation.
When not stopped, the PIT may generate an interrupt to exit the
low-power modes.
When not stopped, the serial peripheral interface (SPI) may generate an
interrupt to exit the low-power modes.
SPI operation in doze mode is programmable. Depending on the state of
internal bits, the SPI can operate normally when the CPU is in doze
mode or the SPI clock generation can be turned off and the SPI module
enters a power conservation state during doze mode. During doze
mode, any master transmission in progress stops. Reception and
transmission of a byte as slave continues so that the slave is
synchronized to the master.
The SPI is inactive in stop mode for reduced power consumption.
When not stopped, the serial communications interface (SCI) may
generate an interrupt to exit the low-power modes.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Clearing the SPI enable bit (SPE) disables the SPI function.
The SPI is unaffected by wait mode and may generate an interrupt
to exit this mode.
Clearing the transmit enable bit (TE) or the receiver enable bit
(RE) disables SCI functions.
The SCIs are unaffected by wait mode and may generate an
interrupt to exit this mode.
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Power Management
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
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