MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 528

• Manufacturer Part Number: MMC2114CFCAG33
• Description: IC MCU 32BIT 33MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2114CFCAG33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 67
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: MMC2114
• Core: M-CORE
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 104
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Controller Family/series: MCORE
• No. Of I/o's: 104
• Ram Memory Size: 32KB
• Cpu Speed: 33MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

External Bus Interface Module (EBI)
20.2 Introduction
Advance Information
528
20.8
20.8.1
20.8.2
20.9
20.9.1
20.9.2
20.9.3
20.9.4
20.9.5
20.10 Bus Monitor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 545
20.11 Interrupts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 545
The external bus interface (EBI) module is responsible for controlling the
transfer of information between the internal M•CORE local bus and
external address space. The external bus has 23 address lines and 32
data lines.
In master mode and emulation mode, the EBI functions as a bus master
and allows internal bus cycles to access external resources. In
single-chip mode, the EBI is active, but the external data bus is not
available, and no external data or termination signals are transferred to
the internal bus.
The EBI supports data transfers to both 32-bit and 16-bit ports.
Chip-select channels are programmed to define the port size for specific
address ranges. When no chip-select is active during an external data
transfer, the port size is defaults to 32 bits.
The EBI supports a variable length external bus cycle to accommodate
the access speed of any device. During an external data transfer, the
EBI drives the address pins, byte enable pins, output enable pins, size
pins, and read/write pins. Wait states are inserted until the bus cycle is
terminated by the assertion of the internal transfer acknowledge signal
by a chip-select channel or by the assertion of the external TA or TEA
pins. The minimum external bus cycle is one clock.
Freescale Semiconductor, Inc.
For More Information On This Product,
Bus Exception Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 540
Emulation Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 540
External Bus Interface Module (EBI)
Transfer Error Termination . . . . . . . . . . . . . . . . . . . . . . . . . 540
Transfer Abort Termination . . . . . . . . . . . . . . . . . . . . . . . . 540
Emulation Chip-Selects (CSE[1:0]) . . . . . . . . . . . . . . . . . .540
Internal Data Transfer Display (Show Cycles) . . . . . . . . . . 541
Show Strobe (SHS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 542
Transfer Code (TC[2:0]) . . . . . . . . . . . . . . . . . . . . . . . . . . . 543
Processor Status (PSTAT) . . . . . . . . . . . . . . . . . . . . . . . . . 543
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