MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 383

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MMC2114CFCAG33

Manufacturer Part Number
MMC2114CFCAG33
Description
IC MCU 32BIT 33MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Datasheets

Specifications of MMC2114CFCAG33

Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MMC2114
Core
M-CORE
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
104
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
MCORE
No. Of I/o's
104
Ram Memory Size
32KB
Cpu Speed
33MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
NOTE:
Serial Communications Interface Modules (SCI1 and SCI2)
To verify the start bit and to detect noise, data recovery logic takes
samples at RT3, RT5, and RT7.
If start bit verification is not successful, the RT clock is reset and a new
search for a start bit begins.
To determine the value of a data bit and to detect noise, recovery logic
takes samples at RT8, RT9, and RT10.
The RT8, RT9, and RT10 data samples do not affect start bit verification.
If any or all of the RT8, RT9, and RT10 samples are logic 1s following a
successful start bit verification, the NF flag is set and the receiver
interprets the bit as a start bit (logic 0).
RT8, RT9, and RT10 Samples
Freescale Semiconductor, Inc.
RT3, RT5, and RT7 Samples
For More Information On This Product,
Go to: www.freescale.com
000
001
010
011
100
101
110
111
000
001
010
100
101
011
110
111
Table 17-6. Start Bit Verification
Table 17-7. Data Bit Recovery
Serial Communications Interface Modules (SCI1 and SCI2)
Data Bit Determination
Start Bit Verification
0
0
0
1
0
1
1
1
Yes
Yes
Yes
Yes
No
No
No
No
Advance Information
Noise Flag
Noise Flag
0
1
1
1
1
1
1
0
Receiver
0
1
1
0
1
0
0
0
383

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