MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 240

• Manufacturer Part Number: MMC2114CFCAG33
• Description: IC MCU 32BIT 33MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2114CFCAG33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 67
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: MMC2114
• Core: M-CORE
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 104
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Controller Family/series: MCORE
• No. Of I/o's: 104
• Ram Memory Size: 32KB
• Cpu Speed: 33MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Second Generation FLASH for M•CORE (SGFM)
10.10 Resets
10.11 Interrupts
Advance Information
240
state of the SGFM will be determined by the FLASH security word,
which, after being erased, will read 0xffff_ffff, thus unsecuring the
module.
The SGFM array is not accessible for any operations via the address and
data buses during reset. If a reset occurs while any command is in
progress that command will immediately abort. The state of any word
being programmed or any erase pages/physical blocks being erased is
not guaranteed.
The SGFM module can request an interrupt when all commands are
completed or when the address, data, and command buffers are empty.
Figure 10-19
the CBEIE and CCIE bits as well as the register bank select signals to
enable interrupt requests. By taking into account the selected register
bank, false interrupt requests are not generated when the command
buffer is empty in an unselected register bank.
Command, data and address
buffers empty
All commands are completed
Freescale Semiconductor, Inc.
Second Generation FLASH for M•CORE (SGFM)
For More Information On This Product,
Interrupt
Source
Go to: www.freescale.com
shows the SGFM interrupt mechanism. This system uses
Table 10-7
Ã
SGFM Interrupt Sources
(SGFMUSTAT)
(SGFMUSTAT)
Interrupt
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
CBEIF
CCIF
Flag
(SGFMMCR)
(SGFMMCR)
Enable
CBEIE
Local
CCIE
Global Mask
MOTOROLA
IE/FE bit
IE/FE bit
(PSR)