MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 349

• Manufacturer Part Number: MMC2114CFCAG33
• Description: IC MCU 32BIT 33MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2114CFCAG33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 67
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: MMC2114
• Core: M-CORE
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 104
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Controller Family/series: MCORE
• No. Of I/o's: 104
• Ram Memory Size: 32KB
• Cpu Speed: 33MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

16.8.5 General-Purpose I/O Ports
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
An I/O pin used by the timer defaults to general-purpose I/O unless an
internal function which uses that pin is enabled.
The timer pins can be configured for either an input capture function or
an output compare function. The IOSx bits in the Timer IC/OC Select
Register configure the timer port pins as either input capture or output
compare pins.
The Timer Port Data Direction Register controls the data direction of an
input capture pin. External pin conditions trigger input captures on input
capture pins configured as inputs.
To configure a pin for input capture:
TIMDDR does not affect the data direction of an output compare pin. The
output compare function overrides the Data Direction Register but does
not affect the state of the Data Direction Register.
To configure a pin for output compare:
Table 16-7
1. Clear the pin’s IOS bit in TIMIOS.
2. Clear the pin’s DDR bit in TIMDDR.
3. Write to TIMCTL2 to select the input edge to detect.
1. Set the pin’s IOS bit in TIMIOS.
2. Write the output compare value to TIMCxH/L.
3. Clear the pin’s DDR bit in TIMDDR.
4. Write to the OMx/OLx bits in TIMCTL1 to select the output action.
Freescale Semiconductor, Inc.
For More Information On This Product,
Timer Modules (TIM1 and TIM2)
shows how various timer settings affect pin functionality.
Go to: www.freescale.com
Timer Modules (TIM1 and TIM2)
Functional Description
Advance Information
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