MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 210

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MMC2114CFCAG33

Manufacturer Part Number
MMC2114CFCAG33
Description
IC MCU 32BIT 33MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Datasheets

Specifications of MMC2114CFCAG33

Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MMC2114
Core
M-CORE
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
104
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
MCORE
No. Of I/o's
104
Ram Memory Size
32KB
Cpu Speed
33MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Second Generation FLASH for M•CORE (SGFM)
Advance Information
210
The SGFM module has hardware interlocks to protect data from
accidental corruption. The SGFM memory array is logically divided into
8-Kbyte sectors for the purpose of data protection and access control. A
flexible scheme allows the protection of any combination of logical
sectors (see
mechanism is available to control supervisor/user and program/data
space access to these sectors.
The SGFM configuration field comprises 44 bytes of reserved array
memory space that determines the module protection and access
restrictions out of reset. Data to secure the FLASH from unauthorized
access is also stored in the SGFM configuration field.
describes each byte used in this field.
The SGFM module also contains a set of control and status registers.
The memory map for these registers and their accessibility in supervisor
and user modes is shown in
The SGFM module contains one to four sets of banked registers
depending on the size of the array. The active register bank is selected
via the BKSEL field in the unbanked Module Configuration Register
(SGFMCR). Each set of banked registers controls the operation of two
interleaving FLASH physical blocks such that Block 0L and Block 0H are
controlled with one register bank. Other blocks are controlled in a similar
fashion as shown in
Freescale Semiconductor, Inc.
Second Generation FLASH for M•CORE (SGFM)
For More Information On This Product,
Go to: www.freescale.com
10.7.2.1 SGFM Protection
Figure
10-2.
Table
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
10-2.
Register). A similar
Table 10-1
MOTOROLA

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