MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 373

• Manufacturer Part Number: MMC2114CFCAG33
• Description: IC MCU 32BIT 33MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2114CFCAG33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 67
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: MMC2114
• Core: M-CORE
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 104
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Controller Family/series: MCORE
• No. Of I/o's: 104
• Ram Memory Size: 32KB
• Cpu Speed: 33MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

17.7.9 SCI Data Direction Register
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
NOTE:
Serial Communications Interface Modules (SCI1 and SCI2)
Address: SCI1 — 0x00cc_000a
Read: Anytime
Write: Anytime
RSVD[7:2] — Reserved
DDRSC[1:0] — SCIPORT Data Direction Bits
When LOOPS = 0 and TE = RE = 1, the RXD pin is an input and the
TXD pin is an output regardless of the state of the DDRSC1 (TXD) and
DDRSC0 (RXD) bits.
Reset:
Read:
Write:
Writing to these read/write bits updates their values but has no effect
on functionality.
These bits control the data direction of the SCIPORT pins. Reset
clears DDRSC[1:0].
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Corresponding pin configured as output
0 = Corresponding pin configured as input
Figure 17-12. SCI Data Direction Register (SCIDDR)
SCI2 — 0x00cd_000a
RSVD7
Bit 7
0
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RSVD6
6
0
Serial Communications Interface Modules (SCI1 and SCI2)
RSVD5
5
0
RSVD4
4
0
RSVD3
3
0
Memory Map and Registers
RSVD2
2
0
Advance Information
DDRSC1 DDRSC0
1
0
Bit 0
0
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