MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 205

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MMC2114CFCAG33

Manufacturer Part Number
MMC2114CFCAG33
Description
IC MCU 32BIT 33MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Datasheets

Specifications of MMC2114CFCAG33

Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MMC2114
Core
M-CORE
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
104
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
MCORE
No. Of I/o's
104
Ram Memory Size
32KB
Cpu Speed
33MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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10.3 Glossary
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
SGFM — Second generation FLASH for M•CORE. Acronym used
throughout this document to reference this module.
SGFM Module — Includes the bus interface, command controller,
built-in self test (BIST) controller, and the FLASH physical blocks.
FLASH Physical Block — A 64-Kbyte FLASH hard block organized as
32,768 halfwords (32K x 16 bits) that includes high voltage generation
and parametric test features.
FLASH Logical Sector — An 8-Kbyte sector of contiguous FLASH
memory that can be protected from program and erase operations. A
logical sector can have supervisor/user and program/data space access
restrictions.
FLASH Erase Page — Eight rows of 64 bytes (512 bytes) in one FLASH
physical block. Two pages, one from each interleaving physical block,
are erased at one time.
Banked Register — A register that operates on two interleaved FLASH
physical blocks. Banked registers share the same control register
addresses as the equivalent registers for the other FLASH physical
blocks. The active register bank is selected by a bank select field in the
unbanked register space. The SGFM module contains one to four sets
of banked registers depending on the size of the array.
Unbanked Register — A register which operates upon all FLASH
physical blocks.
Command Sequence — A three step sequence to program, erase, or
verify the FLASH.
FLASH User Mode — The mode in which the FLASH module operates
when executing user code and software controlled program and erase
operations.
SATO — Acronym used for sense amplifier timeout analog hard-macro
block. The SATO saves power at low system clock frequencies by
limiting the time during which sense amps are enabled.
Erased State — Bit state that reads as a 1.
Programmed State — Bit state that reads as a 0.
Freescale Semiconductor, Inc.
Second Generation FLASH for M•CORE (SGFM)
For More Information On This Product,
Go to: www.freescale.com
Second Generation FLASH for M•CORE (SGFM)
Advance Information
Glossary
205

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