MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 315

• Manufacturer Part Number: MMC2114CFCAG33
• Description: IC MCU 32BIT 33MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2114CFCAG33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 67
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: MMC2114
• Core: M-CORE
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 104
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Controller Family/series: MCORE
• No. Of I/o's: 104
• Ram Memory Size: 32KB
• Cpu Speed: 33MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

15.7.2 Free-Running Timer Operation
15.7.3 Timeout Specifications
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
PIT CLOCK
COUNTER
MODULUS
PIF
0x0002
This mode of operation is selected when the RLD bit in PCSR is clear.
In this mode, the counter rolls over from 0x0000 to 0xFFFF without
reloading from the modulus latch and continues to decrement.
When the counter reaches a count of 0x0000, the PIF flag is set in
PCSR. If the PIE bit is set in PCSR, the PIF flag issues an interrupt
request to the CPU.
When the OVW bit is set in PCSR, the counter can be directly initialized
by writing to PMR without having to wait for the count to reach 0x0000.
The 16-bit PIT counter and prescaler supports different timeout periods.
The prescaler divides the system clock as selected by the PRE[3:0] bits
in PCSR. The PM[15:0] bits in PMR select the timeout period.
Programmable Interrupt Timer Modules (PIT1 and PIT2)
Figure 15-6. Counter in Free-Running Mode
Freescale Semiconductor, Inc.
For More Information On This Product,
timeout period = PRE[3:0]
Go to: www.freescale.com
0x0001
Programmable Interrupt Timer Modules (PIT1 and PIT2)
0x0005
(PM[15:0] + 1) clocks
0x0000
Functional Description
0xFFFF
Advance Information
315