MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 174

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MMC2114CFCAG33

Manufacturer Part Number
MMC2114CFCAG33
Description
IC MCU 32BIT 33MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Datasheets

Specifications of MMC2114CFCAG33

Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MMC2114
Core
M-CORE
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
104
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
MCORE
No. Of I/o's
104
Ram Memory Size
32KB
Cpu Speed
33MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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M•CORE M210 Central Processor Unit (CPU)
Advance Information
174
JMP
JMPI
JSR
JSRI
LD.[BHW]
LDM
LDQ
LOOPT
LRW
LSL, LSR
LSLC, LSRC
LSLI, LSRI
MFCR
MOV
MOVI
MOVF
MOVT
MTCR
MULT
MVC
MVCV
NOT
OR
ROTLI
RSUB
RSUBI
RTE
RFI
SEXTB
SEXTH
ST.[BHW]
STM
STQ
STOP
SUBC
SUBU
SUBI
SYNC
TRAP
TST
TSTNBZ
WAIT
Mnemonic
Jump
Jump Indirect
Jump to Subroutine
Jump to Subroutine Indirect
Load
Load Multiple Registers
Load Register Quadrant
Decrement with C-Bit Update and Branch if Condition True
Load Relative Word
Logical Shift Left and Right
Logical Shift Left and Right, Update C Bit
Logical Shift Left and Right by Immediate
Move from Control Register
Move
Move Immediate
Move on Condition False
Move on Condition True
Move to Control Register
Multiply
Move C Bit to Register
Move Inverted C Bit to Register
Logical Complement
Logical Inclusive-OR
Rotate Left by Immediate
Reverse Subtract
Reverse Subtract Immediate
Return from Exception
Return from Interrupt
Sign-Extend Byte
Sign-Extend Half-Word
Store
Store Multiple Registers
Store Register Quadrant
Stop
Subtract with C Bit
Subtract
Subtract Immediate
Synchronize
Trap
Test Operands
Test for No Byte Equal Zero
Wait
Table 7-1. M•CORE Instruction Set (Sheet 2 of 3)
Freescale Semiconductor, Inc.
M•CORE M210 Central Processor Unit (CPU)
For More Information On This Product,
Go to: www.freescale.com
Description
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
Execution Time
(Cycles)
3–18
Indet
Indet
n+1
n+1
1/2
MOTOROLA
2
3
2
3
2
5
2
1
1
1
2
1
1
1
1
2
1
1
1
1
1
1
1
3
3
1
1
2
5
1
1
1
1
5
1
1
(1)
(4)
(4)
(3)
(2)
(2)

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