ml670100 Oki Semiconductor, ml670100 Datasheet - Page 109

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ml670100

Manufacturer Part Number
ml670100
Description
Ml670100 Is A High-performance 32-bit Microcontroller
Manufacturer
Oki Semiconductor
Datasheet
7.3.5
TMOUT[n] output for
IOLV=2'b00
TMOUT[n] output for
IOLV=2'b01
Starting value
(from TMnR)
Setting the MOD field in Timer Control Register n (TMnCON, n=0 - 5) to 2’b11 (CAP)
configures timer channel n in capture (CAP) mode.
Arrival of a capture event, the edge (or edges) specified in the IOLV field in Timer I/O Level
Register n (TMnIOLV, n=0 - 5), in the signal from Timer Input n pin (TMIN[n], n=0 - 5)
causes the timer channel to copy the Timer Counter n (TMnC, n=0 - 5) contents to Timer
General-Purpose Register n (TMnGR, n=0 - 5).
Counter overflow and capture events both generate interrupt requests - FTMOVn and EVENTn
(n=0 - 5), respectively.
Figure 7.14 illustrates capture (CAP) operation.
Capture (CAP) Mode
TMnGR value
0xFFFF
0x0000
FTMOVn
TMnC contents
Figure 7.13 : Pulse Width Modulation (PWM) Operation
7-17

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