ml670100 Oki Semiconductor, ml670100 Datasheet - Page 200

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ml670100

Manufacturer Part Number
ml670100
Description
Ml670100 Is A High-performance 32-bit Microcontroller
Manufacturer
Oki Semiconductor
Datasheet
11.6.2
11-44
Figure 11.37 shows sample configurations with the external data bus width to memory bank 1
set to 16 bits for connecting SRAMs with data widths of 8 or 16 bits.
Connecting the nEA pin to V
its primary function as an I/O port, so the program must first reconfigure it for its secondary
function as the external address bus pins XA23 to XA16. Set the BWB1 bit in the Bus Width
Control Register (BWCON) to "1" to set the external data bus width to 16.
The first example uses paired SRAMs each with a data width of 8 bits, so set the BAS1 bit in
the Bus Access Control Register (BACON) to access the bank with two Write Enable (nWE)
signals. The second example uses an SRAM with a data width of 16 bits and separate nLB and
nUB pins, so set the BAS1 bit to "1" to access the bank with two Byte Select signals (nHB and
nLB).
Connecting SRAM
Figure 11.36 : Connecting External ROM
DBSEL
nCS0
XD14
XD15
XA17
XA18
nRD
XD0
XD1
XA1
XA2
XA3
nEA
(2) ROM with 16-bit data width
DD
and resetting the LSI with the nRST pin configures PIO0 for
VDD
GND
A0
A1
A2
A16
A17
D0
D1
D14
D15
nCE
nOE
256K X 16 ROM

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